Hardware-Based TCP Processor for Gigabit Ethernet

Abstract

Transmission Control Protocol (TCP) and Ethernet have been widely used in readout systems. These protocols are defacto standards and have been implemented on standard operating systems. However, some small devices, e.g., front-end devices and detectors, are not capable of employing these protocols because of hardware size limitations. This paper describes a TCP processor for Gigabit Ethernet with a circuit size suitable for implementing on a single field programmable gate array. The only peripheral device required is a single Ethernet physical layer device. The hardware was implemented and its TCP throughput was measured. The throughputs in both directions simultaneously were at the upper limits of Gigabit Ethernet. A mechanism for slow control over User Datagram Protocol (UDP) is also provided. The processor described here allows adoption of TCP/Ethernet in small devices that have hardware size limitations.