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タイトル: Switch-on-Future-Event : A New Multithreaded Architecture for Single Programs
その他のタイトル: Switch-on-Future-Event : 単一プログラムを高速化する新しいマルチスレッドアーキテクチャ
著者: Kurata, Naruki
著者(別言語): 倉田, 成己
発行日: 2012年3月22日
抄録: Delinquent instructions are a small number of static instructions that cause most branch prediction misses and cache misses in a program. These delinquent instructions are one of the main factors that degrade the performance of recent processors. One multithreading scheme that hides the latency of such delinquent instructions and speed up a single program is called Helper Threading. Helper Threading creates a helper thread which consists of a delinquent instruction and the instructions it depends on, and executes them earlier than the main thread to achieve accurate branch prediction or prefetching. However, we found an important feature of the delinquent instructions that most of them are executed in small loops. In such a small loop, Helper Threading cannot improve performance because it not only cannot do pre-execution sufficiently earlier than the main thread, but also prevents it from executing. We propose a new scheme of multithreading called Switch-on-Future-Event Multithreading (SoF-MT). SoF-MT regards each iteration of a loop as a thread and executes them simultaneously. The processor switches a thread when it fetches a delinquent instruction to hide the latency of a miss that the instruction will cause in the future. This technique works well because delinquent instructions are in small loops and the processor can create a sufficient number of threads to switch. This scheme is free from the problems which Helper Threading suffers from. Simulation results show that our proposal achieves performance improvement by an average of 10.1% and a maximum of 38.7%, whereas Helper Threading provides only 13.2% speedup at a maximum.
内容記述: 報告番号: ; 学位授与年月日: 2012-03-22 ; 学位の種別: 修士 ; 学位の種類: 修士(情報理工学) ; 学位記番号: ; 研究科・専攻: 情報理工学系研究科電子情報学専攻
URI: http://hdl.handle.net/2261/51729
出現カテゴリ:025 修士論文
1244025 修士論文(電子情報学専攻)

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