2024-03-29T11:52:41Z
https://repository.dl.itc.u-tokyo.ac.jp/oai
oai:repository.dl.itc.u-tokyo.ac.jp:00004989
2022-12-19T03:46:42Z
6:260:318
9:233:280
Optimum Design of Subquarter-micrometer-gate CMOS/SOI Circuits for High-speed and Low-power Operation
高速低消費電力のためのサブクォ-タミクロンゲ-トCMOS/SOI回路の最適設計
Fujishima, Minoru
1993-03-29
eng
thesis
https://doi.org/10.11501/3095469
http://hdl.handle.net/2261/54363
https://repository.dl.itc.u-tokyo.ac.jp/records/4989
10.11501/3095469
甲第09999
博士(工学)
1993-03-29
University of Tokyo (東京大学)
https://repository.dl.itc.u-tokyo.ac.jp/record/4989/files/273319.pdf
application/pdf
9.5 MB
2017-06-01