{"created":"2021-03-01T06:20:05.058824+00:00","id":3443,"links":{},"metadata":{"_buckets":{"deposit":"d17819ed-829b-4177-a7b8-b152dfc1deb2"},"_deposit":{"id":"3443","owners":[],"pid":{"revision_id":0,"type":"depid","value":"3443"},"status":"published"},"_oai":{"id":"oai:repository.dl.itc.u-tokyo.ac.jp:00003443","sets":["34:105:262","9:233:234"]},"item_7_alternative_title_1":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Timing-Fault-Tolerant Out-of-Order Processor"}]},"item_7_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2012-03-22","bibliographicIssueDateType":"Issued"},"bibliographic_titles":[{}]}]},"item_7_date_granted_25":{"attribute_name":"学位授与年月日","attribute_value_mlt":[{"subitem_dategranted":"2012-03-22"}]},"item_7_degree_name_20":{"attribute_name":"学位名","attribute_value_mlt":[{"subitem_degreename":"修士(情報理工学)"}]},"item_7_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"半導体プロセスが微細化するにつれて, ばらつきの問題が深刻化してきている. 今後の半導体産業の発展には, ばらつきを吸収する回路技術が不可欠である. プロセッサを対象とするばらつき対策の1つに, タイミング・フォールト(TF)を動的に検出/回復するプロセッサを用いる手法が提案されているが, 既存の手法では近年の複雑なOut-of-Orderスーパスカラ・プロセッサに対応できない. 本研究では, Out-of-Orderスーパスカラ・プロセッサのコミット・モジュール周りを詳細に検討し, 既存の手法では回復できなかったロード/ストア・キュー(LSQ)の制御系のTFからも回復できるコミット方式を提案する. これは, 通常はLSQ内にあるストア・バッファをLSQから分離し, In-OrderなコミットをTFから完全に保護することで可能となる. ストア・バッファをLSQから分離することで, コミットのレイテンシが増加するが, これによる性能低下は平均で0.7%, 最低でも6.0%と十分に低いことを予備評価で確認した.","subitem_description_type":"Abstract"}]},"item_7_full_name_3":{"attribute_name":"著者別名","attribute_value_mlt":[{"nameIdentifiers":[{"nameIdentifier":"8261","nameIdentifierScheme":"WEKO"}],"names":[{"name":"Arima, Satoshi"}]}]},"item_7_select_21":{"attribute_name":"学位","attribute_value_mlt":[{"subitem_select_item":"master"}]},"item_7_subject_13":{"attribute_name":"日本十進分類法","attribute_value_mlt":[{"subitem_subject":"549","subitem_subject_scheme":"NDC"}]},"item_7_text_24":{"attribute_name":"研究科・専攻","attribute_value_mlt":[{"subitem_text_value":"情報理工学系研究科電子情報学専攻"}]},"item_7_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学大学院情報理工学系研究科電子情報学専攻"},{"subitem_text_value":"Department of Information and Communication Engineering, Graduate School of Information Science and Technology, The University of Tokyo"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"有馬, 慧"}],"nameIdentifiers":[{"nameIdentifier":"8260","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2017-05-31"}],"displaytype":"detail","filename":"48106401.pdf","filesize":[{"value":"1.4 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"48106401.pdf","url":"https://repository.dl.itc.u-tokyo.ac.jp/record/3443/files/48106401.pdf"},"version_id":"6737f7a8-b6cb-4ece-a3b2-6173bf314ced"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"thesis","resourceuri":"http://purl.org/coar/resource_type/c_46ec"}]},"item_title":"タイミング・フォールト耐性を持つOut-of-Orderプロセッサ","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"タイミング・フォールト耐性を持つOut-of-Orderプロセッサ"}]},"item_type_id":"7","owner":"1","path":["234","262"],"pubdate":{"attribute_name":"公開日","attribute_value":"2012-10-01"},"publish_date":"2012-10-01","publish_status":"0","recid":"3443","relation_version_is_last":true,"title":["タイミング・フォールト耐性を持つOut-of-Orderプロセッサ"],"weko_creator_id":"1","weko_shared_id":null},"updated":"2022-12-19T03:45:07.215539+00:00"}