{"created":"2021-03-01T07:10:15.318932+00:00","id":49370,"links":{},"metadata":{"_buckets":{"deposit":"91a3e25f-d6f9-4d8f-8258-95ca4da05558"},"_deposit":{"id":"49370","owners":[],"pid":{"revision_id":0,"type":"depid","value":"49370"},"status":"published"},"_oai":{"id":"oai:repository.dl.itc.u-tokyo.ac.jp:00049370","sets":["34:105:262","9:233:234"]},"item_7_alternative_title_1":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Multi-Processor System Design with Secure Processors"}]},"item_7_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2017-03-23","bibliographicIssueDateType":"Issued"},"bibliographic_titles":[{}]}]},"item_7_date_granted_25":{"attribute_name":"学位授与年月日","attribute_value_mlt":[{"subitem_dategranted":"2017-03-23"}]},"item_7_degree_name_20":{"attribute_name":"学位名","attribute_value_mlt":[{"subitem_degreename":"修士(情報理工学) "}]},"item_7_full_name_3":{"attribute_name":"著者別名","attribute_value_mlt":[{"nameIdentifiers":[{"nameIdentifier":"146485","nameIdentifierScheme":"WEKO"}],"names":[{"name":"Kajiwara, Takuya"}]}]},"item_7_select_21":{"attribute_name":"学位","attribute_value_mlt":[{"subitem_select_item":"master"}]},"item_7_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学大学院情報理工学系研究科電子情報学専攻"},{"subitem_text_value":"Graduate School of Information Science and Technology Department of Information and Communication Engineering The University of Tokyo"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"梶原, 拓也"}],"nameIdentifiers":[{"nameIdentifier":"146484","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2018-05-11"}],"displaytype":"detail","filename":"48146409.pdf","filesize":[{"value":"1.4 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"48146409.pdf","url":"https://repository.dl.itc.u-tokyo.ac.jp/record/49370/files/48146409.pdf"},"version_id":"91c89fd4-1627-444e-ba3e-2b252787b14d"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"thesis","resourceuri":"http://purl.org/coar/resource_type/c_46ec"}]},"item_title":"セキュアプロセッサを用いたマルチプロセッサシステムの構成","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"セキュアプロセッサを用いたマルチプロセッサシステムの構成"}]},"item_type_id":"7","owner":"1","path":["234","262"],"pubdate":{"attribute_name":"公開日","attribute_value":"2018-05-11"},"publish_date":"2018-05-11","publish_status":"0","recid":"49370","relation_version_is_last":true,"title":["セキュアプロセッサを用いたマルチプロセッサシステムの構成"],"weko_creator_id":"1","weko_shared_id":null},"updated":"2022-12-19T04:24:16.540976+00:00"}